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Freescale Semiconductor /MK80F25615 /SIM /SCGC2

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Interpret as SCGC2

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https://regviz.com/r/Freescale Semiconductor/MK80F25615/SIM/SCGC2#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)LPUART0 0 (0)LPUART1 0 (0)LPUART2 0 (0)LPUART3 0 (0)TPM1 0 (0)TPM2 0 (0)DAC0 0 (0)EMVSIM0 0 (0)EMVSIM1 0 (0)LPUART4 0 (0)QSPI 0 (0)FLEXIO

LPUART0=0, EMVSIM0=0, FLEXIO=0, EMVSIM1=0, LPUART1=0, QSPI=0, LPUART4=0, DAC0=0, TPM1=0, TPM2=0, LPUART2=0, LPUART3=0

Description

System Clock Gating Control Register 2

Fields

LPUART0

LPUART0 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled
LPUART1

LPUART1 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled
LPUART2

LPUART2 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled
LPUART3

LPUART3 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled
TPM1

TPM1 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled
TPM2

TPM2 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled
DAC0

DAC0 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled
EMVSIM0

EMVSIM0 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled
EMVSIM1

EMVSIM1 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled
LPUART4

LPUART4 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled
QSPI

QSPI Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled
FLEXIO

FlexIO Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

Links

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data